EMI susceptibility of the output pin in CMOS amplifiers

Measurements in commercial devices demonstrate a considerable susceptibility of the operational amplifiers to the electromagnetic interferences coupled to their output pin. This paper investigates some basic architectures starting from single stage amplifiers up to a whole operational amplifier. The result is a correlation between the different amplifier configurations, the output impedance and the susceptibility to the interferences. The simulations are perfomed by using the standard CMOS UMC 180nm technology and by running the netlist of the schematics extracted from the layout.